This invention relates to an integrated memory circuit including a clock input for receiving a clock signal, a data input for receiving a data bit under the control of the clock signal, and a data output, the memory circuit also including a memory loop comprising a first and a second gate.
A memory circuit of this kind is known from the Philips Data Handbook "Integrated Circuits", book IC06N, new series 1985, showing a logic diagram of a flip-flop circuit in the integrated circuit HCT74 on page 188. This flipflop circuit includes two memory circuits, each of which includes a memory loop with two NAND-gates and a transfer gate. In addition, each memory loop is provided with a second transfer gate which is connected to its input. The use of transfer gates has the drawback that they must be driven by the clock signal and by the inverted clock signal. Consequently, at high clock frequencies unavoidable phase differences will occur between these clock signals so that the reliability of the memory loops can no longer be ensured.
However, it is alternatively possible to omit the transfer gates from the memory loops and to replace the transfer gates at the inputs of the memory loops by logic input gates which conduct a data bit to the memory loops under the control of the clock signal. Memory circuits of this kind have the drawback that correct storage of a data bit may be dependent on the signal propagation through the individual gates. The operation cannot be predicted or ensured in all circumstances, which makes such a memory circuit unsuitable for practical use in, for example, integrated circuits.